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Subject: RE: mgmt bus interrupts on the c006
Date: Tue, 2 Oct 2007 09:18:17 -0800
Message-ID: <BB375AF679D4A34E9CA8DFA650E2B04E05CB81DE@onstor-exch02.onstor.net>
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Thread-Topic: mgmt bus interrupts on the c006
Thread-Index: AcgEfAB4Xt/Cw0rDTAqPCblU6dwmeQAm943g
References: <20071001153959.315732a6@ripper.onstor.net>
From: "Brian Stark" <brian.stark@onstor.com>
To: "Andy Sharp" <andy.sharp@onstor.com>

Andy,

Yes, the plan is to use PCI mailbox interrupts instead of the FPGA
interrupts.  On both the 1125 and 1480, I believe these are part of the
internal interrupt mapper and don't use the standard PCI interrupts
(INTA_L, INTB_L, etc.).  I'll have to look into this further, but you're
also free to look into the SiByte docs!  :-)


Brian
=20

> -----Original Message-----
> From: Andy Sharp=20
> Sent: Monday, October 01, 2007 3:40 PM
> To: Brian Stark
> Subject: mgmt bus interrupts on the c006
>=20
> Hi Brian,
>=20
> I'm working on the management bus code, and I'm assuming that=20
> we are going to use some PCI interrupts for the management=20
> bus interrupts, rather than interrupts from the BMFPGA like=20
> on Bobcat; any idea what those IRQs might be at the moment? =20
> Just thought I would ask.  Trying to get this crufty code=20
> ported to the kug.
>=20
> Cheers,
>=20
> a
>=20
