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From: Phil Sutter <n0-1@freewrt.org>
To: Linux-Mips List <linux-mips@linux-mips.org>
CC: "ralf@linux-mips.org" <ralf@linux-mips.org>, "florian@openwrt.org"
	<florian@openwrt.org>
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Date: Mon, 19 Jan 2009 14:42:52 -0800
Subject: [PATCH 3/5] MIPS: rb532: move dev3 init code to devices.c
Thread-Topic: [PATCH 3/5] MIPS: rb532: move dev3 init code to devices.c
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This code doesn't belong to gpio.c, as it's completely unrelated to
GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more
adequate place.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
---
 arch/mips/rb532/devices.c |   39 +++++++++++++++++++++++++++++++++++++++
 arch/mips/rb532/gpio.c    |   39 ---------------------------------------
 2 files changed, 39 insertions(+), 39 deletions(-)

diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 3c74561..1a0209e 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -42,6 +42,34 @@
=20
 extern unsigned int idt_cpu_freq;
=20
+static struct mpmc_device dev3;
+
+void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&dev3.lock, flags);
+
+	dev3.state =3D (dev3.state | or_mask) & ~nand_mask;
+	writeb(dev3.state, dev3.base);
+
+	spin_unlock_irqrestore(&dev3.lock, flags);
+}
+EXPORT_SYMBOL(set_latch_u5);
+
+unsigned char get_latch_u5(void)
+{
+	return dev3.state;
+}
+EXPORT_SYMBOL(get_latch_u5);
+
+static struct resource rb532_dev3_ctl_res[] =3D {
+	{
+		.name	=3D "dev3_ctl",
+		.flags	=3D IORESOURCE_MEM,
+	}
+};
+
 static struct resource korina_dev0_res[] =3D {
 	{
 		.name =3D "korina_regs",
@@ -314,6 +342,17 @@ static int __init plat_setup_devices(void)
 	nand_slot0_res[0].start =3D readl(IDT434_REG_BASE + DEV2BASE);
 	nand_slot0_res[0].end =3D nand_slot0_res[0].start + 0x1000;
=20
+	/* Read the third (multi purpose) resources from the DC */
+	rb532_dev3_ctl_res[0].start =3D readl(IDT434_REG_BASE + DEV3BASE);
+	rb532_dev3_ctl_res[0].end =3D rb532_dev3_ctl_res[0].start + 0x1000;
+
+	dev3.base =3D ioremap_nocache(rb532_dev3_ctl_res[0].start, 0x1000);
+
+	if (!dev3.base) {
+		printk(KERN_ERR "rb532: cannot remap device controller 3\n");
+		return -ENXIO;
+	}
+
 	/* Initialise the NAND device */
 	rb532_nand_setup();
=20
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 7e0cb4f..b9cb428 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -41,8 +41,6 @@ struct rb532_gpio_chip {
 	void __iomem	 *regbase;
 };
=20
-struct mpmc_device dev3;
-
 static struct resource rb532_gpio_reg0_res[] =3D {
 	{
 		.name 	=3D "gpio_reg0",
@@ -52,13 +50,6 @@ static struct resource rb532_gpio_reg0_res[] =3D {
 	}
 };
=20
-static struct resource rb532_dev3_ctl_res[] =3D {
-	{
-		.name	=3D "dev3_ctl",
-		.flags	=3D IORESOURCE_MEM,
-	}
-};
-
 void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned v=
al)
 {
 	unsigned long flags;
@@ -86,25 +77,6 @@ unsigned get_434_reg(unsigned reg_offs)
 }
 EXPORT_SYMBOL(get_434_reg);
=20
-void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&dev3.lock, flags);
-
-	dev3.state =3D (dev3.state | or_mask) & ~nand_mask;
-	writeb(dev3.state, dev3.base);
-
-	spin_unlock_irqrestore(&dev3.lock, flags);
-}
-EXPORT_SYMBOL(set_latch_u5);
-
-unsigned char get_latch_u5(void)
-{
-	return dev3.state;
-}
-EXPORT_SYMBOL(get_latch_u5);
-
 /* rb532_set_bit - sanely set a bit
  *
  * bitval: new value for the bit
@@ -241,17 +213,6 @@ int __init rb532_gpio_init(void)
 	/* Register our GPIO chip */
 	gpiochip_add(&rb532_gpio_chip->chip);
=20
-	rb532_dev3_ctl_res[0].start =3D readl(IDT434_REG_BASE + DEV3BASE);
-	rb532_dev3_ctl_res[0].end =3D rb532_dev3_ctl_res[0].start + 0x1000;
-
-	r =3D rb532_dev3_ctl_res;
-	dev3.base =3D ioremap_nocache(r->start, r->end - r->start);
-
-	if (!dev3.base) {
-		printk(KERN_ERR "rb532: cannot remap device controller 3\n");
-		return -ENXIO;
-	}
-
 	return 0;
 }
 arch_initcall(rb532_gpio_init);
--=20
1.5.6.4


