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From: Phil Sutter <n0-1@freewrt.org>
To: Linux-Mips List <linux-mips@linux-mips.org>
CC: "ralf@linux-mips.org" <ralf@linux-mips.org>, "florian@openwrt.org"
	<florian@openwrt.org>
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Date: Mon, 19 Jan 2009 14:42:50 -0800
Subject: [PATCH 1/5] MIPS: rb532: fix init of rb532_dev3_ctl_res
Thread-Topic: [PATCH 1/5] MIPS: rb532: fix init of rb532_dev3_ctl_res
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This register just contains the address of the actual resource, so
initialisation has to be the same as cf_slot0_res and nand_slot0_res.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
---
 arch/mips/rb532/gpio.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index d75eb19..40deb11 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -55,8 +55,6 @@ static struct resource rb532_gpio_reg0_res[] =3D {
 static struct resource rb532_dev3_ctl_res[] =3D {
 	{
 		.name	=3D "dev3_ctl",
-		.start	=3D REGBASE + DEV3BASE,
-		.end	=3D REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
 		.flags	=3D IORESOURCE_MEM,
 	}
 };
@@ -243,6 +241,9 @@ int __init rb532_gpio_init(void)
 	/* Register our GPIO chip */
 	gpiochip_add(&rb532_gpio_chip->chip);
=20
+	rb532_dev3_ctl_res[0].start =3D readl(IDT434_REG_BASE + DEV3BASE);
+	rb532_dev3_ctl_res[0].end =3D rb532_dev3_ctl_res[0].start + 0x1000;
+
 	r =3D rb532_dev3_ctl_res;
 	dev3.base =3D ioremap_nocache(r->start, r->end - r->start);
=20
--=20
1.5.6.4


