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From: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
To: Sergei Shtylyov <sshtylyov@ru.mvista.com>
CC: "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
	"ralf@linux-mips.org" <ralf@linux-mips.org>
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Date: Tue, 17 Mar 2009 17:04:01 -0700
Subject: [PATCH revised] MIPS: Enable prefetch option for VR5500 processor
Thread-Topic: [PATCH revised] MIPS: Enable prefetch option for VR5500
 processor
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Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
Hi,

Sergei Shtylyov wrote:
>     Why not:
>=20
>          c->options |=3D MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;

Thank you, patch revised.

  Shinya

 arch/mips/mm/c-r4k.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b2..871e828 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
 		c->dcache.ways =3D 2;
 		c->dcache.waybit =3D 0;
=20
-		c->options |=3D MIPS_CPU_CACHE_CDEX_P;
+		c->options |=3D MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
 		break;
=20
 	case CPU_TX49XX:

