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From: David Daney <ddaney@caviumnetworks.com>
To: "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
	"ralf@linux-mips.org" <ralf@linux-mips.org>
CC: David Daney <ddaney@caviumnetworks.com>, Guenter Roeck
	<guenter.roeck@ericsson.com>
Sender: "linux-mips-bounce@linux-mips.org" <linux-mips-bounce@linux-mips.org>
Date: Mon, 8 Feb 2010 13:27:00 -0700
Subject: [PATCH] MIPS: Don't probe reserved EntryHi bits.
Thread-Topic: [PATCH] MIPS: Don't probe reserved EntryHi bits.
Thread-Index: Acqo/UY3WuN2tkaMQ2ienri5jr2giQ==
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The patch that adds cpu_probe_vmbits is erroneously writing to
reserved bit 12.  Since we are really only probing high bits, don't
write this bit with a one.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
CC: Guenter Roeck <guenter.roeck@ericsson.com>
---
 arch/mips/kernel/cpu-probe.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 2ff5f64..9ea5ca8 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -287,9 +287,9 @@ static inline int __cpu_has_fpu(void)
 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
 {
 #ifdef __NEED_VMBITS_PROBE
-	write_c0_entryhi(0x3ffffffffffff000ULL);
+	write_c0_entryhi(0x3fffffffffffe000ULL);
 	back_to_back_c0_hazard();
-	c->vmbits =3D fls64(read_c0_entryhi() & 0x3ffffffffffff000ULL);
+	c->vmbits =3D fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL);
 #endif
 }
=20
--=20
1.6.0.6


