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From: David Daney <ddaney@caviumnetworks.com>
To: "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>,
	"ralf@linux-mips.org" <ralf@linux-mips.org>
CC: David Daney <ddaney@caviumnetworks.com>
Sender: "linux-mips-bounce@linux-mips.org" <linux-mips-bounce@linux-mips.org>
Date: Tue, 23 Feb 2010 11:11:47 -0700
Subject: [PATCH] MIPS: Give Octeon+ CPUs their own __cpu_name
Thread-Topic: [PATCH] MIPS: Give Octeon+ CPUs their own __cpu_name
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Signed-off-by: David Daney <ddaney@caviumnetworks.com>
---

This couuld be rolled into the original linux-queue patch that
extablishes CPU_CAVIUM_OCTEON_PLUS.

 arch/mips/kernel/cpu-probe.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ee67aac..be5bb16 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -913,14 +913,15 @@ static inline void cpu_probe_cavium(struct cpuinfo_mi=
ps *c, unsigned int cpu)
 	case PRID_IMP_CAVIUM_CN31XX:
 	case PRID_IMP_CAVIUM_CN30XX:
 		c->cputype =3D CPU_CAVIUM_OCTEON;
-		goto name_and_platform;
+		__cpu_name[cpu] =3D "Cavium Octeon";
+		goto platform;
 	case PRID_IMP_CAVIUM_CN58XX:
 	case PRID_IMP_CAVIUM_CN56XX:
 	case PRID_IMP_CAVIUM_CN50XX:
 	case PRID_IMP_CAVIUM_CN52XX:
 		c->cputype =3D CPU_CAVIUM_OCTEON_PLUS;
-name_and_platform:
-		__cpu_name[cpu] =3D "Cavium Octeon";
+		__cpu_name[cpu] =3D "Cavium Octeon+";
+platform:
 		if (cpu =3D=3D 0)
 			__elf_platform =3D "octeon";
 		break;
--=20
1.6.6.1


