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Date: Thu, 4 Jan 2007 10:41:21 -0800
From: Andrew Sharp <andy.sharp@onstor.com>
To: "dl-Cougar" <dl-Cougar@onstor.com>
Subject: Re: Standalone SSC processor
Message-ID: <20070104104121.450b5d88@ripper.onstor.net>
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On Wed, 3 Jan 2007 20:17:47 -0800 "Brian Stark"
<brian.stark@onstor.com> wrote:

> Andy,
> 
> A couple of things to consider with your proposal:
> 
> - If the Qlogic chip that supports PCI-X is used instead of the PCI-e
> version, the connection between the 1125 and 1480s is problematic.
> My plan was to use 32-bit PCI as defined today in the block diagram,
> but this means the 1480 PCI bus has to run at 33MHz due to the TI CF
> controller.  This wouldn't be enough bandwidth for the FC controllers
> even in the native 4 port config and especially the additional 4 FC
> port expansion case.  We could put a PCI-PCI bridge down like we do
> on Bobcat to run PCI busses at different frequencies, but this would
> take up about as much space as the HT21000 Southbridge.

Well that kills this idea right there.  I figured a PCI bridge would be
one of those barely-seeable chips or something.  Of course, we could go
back to the CF ctrl on the GPIO lines.

> - Speaking of bandwidth, we'll be pushing the limits of the 64-bit,
> 133MHz PCI-X bus with multiple FC ports.  With 4 lanes of PCI-e to
> each Qlogic dual-port controller, that's a theoretical throughput of
> 10Gbps full-duplex for 2 FC ports.  However, the PCI-X bus would have
> to handle up to 8 FC ports with the expansion case.

Not until recently have I started to become fully sync'd up with what
the expansion case really is supposed to be.  I thought it was going to
be two MBs in a case, but otherwise separate except for maybe a built
in ethernet connection for the managment network.  That's what I think
of when I hear 'cluster-in-a-box' but it really sounds more like
super-filer in a box.  We'll call the nex-gen mega-filer.

How does the bandwith of the SPI bus hold up?  I don't know what speed
it's running at, but I've heard they can be quite fast.  The question
is, how much latency is added because we have to go through more
chips/busses?  I guess when you factor in the expansion case it doesn't
matter.

> - The PCI-X spec specifies that only point-to-point connections are
> made when running 133MHz.  Even though we could probably do more
> since the design is embedded, the expansion case that adds 2 more
> Qlogics definitely doesn't work.  We would then have to add bridge
> chips for electrical isolation, and these have essentially the same
> latency as the current HT21000.  The good news about PCI-e is that
> the lanes are electrically isolated already.

It's sounds like it's just really too bad that they didn't go with a
PCI-e on the 1480s instead of PCI-X.  Oh well, we'll go that way in the
next generation!

> 
> Brian

Cheers,

a

> 
> > -----Original Message-----
> > From: Andrew Sharp [mailto:andy.sharp@onstor.com]
> > Sent: Wednesday, January 03, 2007 11:49 AM
> > To: Brian Stark; dl-Cougar
> > Subject: Re: Standalone SSC processor
> >
> > On Wed, 3 Jan 2007 09:57:25 -0800 "Brian Stark"
> > <brian.stark@onstor.com> wrote:
> >
> > > Hi,
> > >
> > > Just an update on the discussion that we had yesterday in
> > the Cougar
> > > meeting.  Broadcom has the SiByte 1125H processor that provides
> > > the following:
> > >
> > > - 1 CPU core
> > > - 32-bit PCI bus
> > > - 2 * GE interfaces
> > > - DDR memory controller
> > > - 2 UARTs
> > >
> > > I am going to look at using the 1125 as a standalone
> > processor, and as
> > > we discussed yesterday, this will largely be a function of
> > board space
> > > and cost.  If we move forward with the 1125, then I would propose
> > > eliminating the BCM5715 dual MAC and using the native GE
> > interfaces of
> > > the 1125.  I would also look at using soldered-down DDR1
> > SDRAM that is
> > > fixed at 512MB if that helps with the layout.
> >
> > While we are getting rid of the separate dual gigE chip, we
> > could also get rid of the separate south bridge chip and run
> > the PCI-X bus of the 1480s at 64 bits/133MHz, and put the
> > Qlogic controllers directly on that bus.  The 32 bit PCI bus
> > on the 1125 can handle the CF controller at that point.  The
> > Qlogics could DMA directly into the 1480s memory without the
> > latency of going through another bus/bottleneck, as well as
> > eliminating the notion that the FPs are best run on the second node.
> >
> > Cheers,
> >
> > a
> > 
> 
