AF:
NF:0
PS:10
SRH:1
SFN:
DSR:
MID:<20071203113605.34c75e6d@ripper.onstor.net>
CFG:
PT:0
S:andy.sharp@onstor.com
RQ:
SSV:onstor-exch02.onstor.net
NSV:
SSH:
R:<ralf@linux-mips.org>,<linux-mips@linux-mips.org>
MAID:1
X-Sylpheed-Privacy-System:
X-Sylpheed-Sign:0
SCF:#mh/Mailbox/sent
RMID:#imap/andys@onstor.net@onstor-exch02.onstor.net/INBOX	0	20071203192010.GA14818@linux-mips.org
X-Sylpheed-End-Special-Headers: 1
Date: Mon, 3 Dec 2007 11:36:18 -0800
From: Andrew Sharp <andy.sharp@onstor.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH] Add code to determine the L2 cache size on Sibyte
 1250/112x processors.
Message-ID: <20071203113618.0a37c718@ripper.onstor.net>
In-Reply-To: <20071203192010.GA14818@linux-mips.org>
References: <20071203175601.GA26533@onstor.com>
	<20071203192010.GA14818@linux-mips.org>
Organization: Onstor
X-Mailer: Sylpheed-Claws 2.6.0 (GTK+ 2.8.20; x86_64-pc-linux-gnu)
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit

On Mon, 3 Dec 2007 19:20:10 +0000 Ralf Baechle <ralf@linux-mips.org>
wrote:

> On Mon, Dec 03, 2007 at 09:56:11AM -0800, Andrew Sharp wrote:
> 
> >  arch/mips/mm/c-sb1.c                 |   70
> > ++++++++++++++++++++++++++++++++++
> 
> c-sb1.c does no longer exist.  The functionality was folded into
> c-r4k.c and at the same time alot of insanity aka pass 1 workarounds
> dropped.

Doh.  I knew that, too.  Mindlessly trying to clear my patch backlog...