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Date: Wed, 30 Jul 2008 17:19:33 -0700
From: Andrew Sharp <andy.sharp@onstor.com>
To: "Brian Stark" <brian.stark@onstor.com>
Subject: Re: kernel and telnet info
Message-ID: <20080730171933.140b3905@ripper.onstor.net>
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I'd rather try the kernel change.  Or would I?  Both choices are making
me ill.  I suspect kernel support will be needed for trying to make
them 100 only anyway.  Or perhaps a PROM change to always add
speed=100FDX kernel command line argument.  That's not the correct
argument, but it's something like that.

On Wed, 30 Jul 2008 16:48:18 -0700 "Brian Stark"
<brian.stark@onstor.com> wrote:

> If we don't take the clock change, which I'm not completely
> comfortable with, then I don't see any choice at this point but to
> limit the ports to 100Mbit.  We just did a build of 70 boards and
> while I agree that we need to understand why some boards behave
> differently than others, there's no way we can scrap these 70
> boards.  We have to make them work, and at this point, it's either
> flipping a clock bit or limiting the ports to 100Mbit.  We know
> there's a problem in the MAC->PHY direction, and since those are
> copper traces running between BGAs, there's basically no way to
> experiment without doing a new board. 
> 
> Since I haven't heard anything back from Broadcom and we need to get
> 1.0.8 out, we'll limit the ports to 100Mbit for now.  We can continue
> working on the hardware and software and then eventually do a 1.0.9
> that doesn't limit to 100Mbit.
> 
> 
> Brian
>   
> 
> 
> 
> > -----Original Message-----
> > From: Andy Sharp 
> > Sent: Wednesday, July 30, 2008 4:33 PM
> > To: Brian Stark
> > Cc: Warren Gale
> > Subject: Re: kernel and telnet info
> > 
> > Whoops, this languished in my Drafts folder and was sorta
> > forgotten...
> > 
> > 
> > My first thought is, fix the hardware.  It seems doubtful 
> > considering what we know that it's supposed to be working 
> > that way, so something must be "hooked up backwards" on some 
> > of these boards (a phrase not to be taken literally) because 
> > some of them work as is.
> > 
> > Unless our particular hardware is designed to work this way 
> > and we don't know it.
> > 
> > I want to continue to look at the driver to see if pinging 
> > between sc0 and sc1 can be made to work properly.
> > 
> > So basically I think we have more work to do in hardware and 
> > software at this point, to see why some boards are supposedly 
> > fine as is, and some aren't.  And to see if the problem of 
> > pinging between eth0 and
> > eth1 can be found.
> > 
> > Restricting the ports to 10/100 is not sitting well with me at all.
> > We've also announced the hardware capabilities at this point, 
> > so we might get some push back from customers at this point.
> > 
> > On Wed, 30 Jul 2008 13:19:44 -0700 "Brian Stark"
> > <brian.stark@onstor.com> wrote:
> > 
> > > I tried this kernel on Rendell's problem child board, and 
> > both ports 
> > > worked when pinging sc0 and sc1 at GigE.  This was the case 
> > when going 
> > > direct connect to another system as well as going through a GigE 
> > > switch. So, flipping the clock edge bit to a 1 definitely is
> > > making the ports work at GigE.
> > > 
> > > I haven't heard anything back from Broadcom yet on my 
> > theory about the 
> > > user's manual having an incorrect definition.  We need to make a 
> > > decision on how to proceed and have 2 options:
> > > 
> > > - Put the clock change into both PROM and kernel, which 
> > will allow sc0 
> > > and sc1 to run at GigE
> > > - Limit the PHY speed to 100Mbit in PROM, no change to kernel
> > > 
> > > Thoughts?
> > > 
> > > 
> > > > -----Original Message-----
> > > > From: Andy Sharp
> > > > Sent: Wednesday, July 30, 2008 11:15 AM
> > > > To: Brian Stark; Warren Gale
> > > > Subject: kernel and telnet info
> > > > 
> > > > Kernel is attached (vmlinux.bin) and telnet is
> > > > 
> > > > telnet 10.2.10.235 9044
> > > > 
> > 
