AF:
NF:0
PS:10
SRH:1
SFN:
DSR:
MID:<20081119190341.0eea15b3@ripper.onstor.net>
CFG:
PT:0
S:andy.sharp@onstor.com
RQ:
SSV:exch1.onstor.net
NSV:
SSH:
R:<brian.stark@onstor.com>,<bob.miller@onstor.com>,<bfisher@onstor.com>
MAID:1
X-Sylpheed-Privacy-System:
X-Sylpheed-Sign:0
SCF:#mh/Mailbox/sent
X-Sylpheed-End-Special-Headers: 1
Date: Wed, 19 Nov 2008 19:05:07 -0800
From: Andrew Sharp <andy.sharp@onstor.com>
To: Brian Stark <brian.stark@onstor.com>
Cc: Bob Miller <bob.miller@onstor.com>, Bill Fisher <bfisher@onstor.com>
Subject: TuxRx Lives!  If but for a moment...
Message-ID: <20081119190507.42323d36@ripper.onstor.net>
Organization: Onstor
X-Mailer: Sylpheed-Claws 2.6.0 (GTK+ 2.8.20; x86_64-pc-linux-gnu)
Mime-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit

TXRX0-PROM> g -e ffffffff83000000            
Linux version 2.6.22-cg-ge347c75a-dirty (andys@ripper) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #594 SMP Wed Nov 19 18:37:22 PST 2008
Booting Linux kernel...Mips64 TuxRx  <=== W00T!
CPU revision is: 01041100
FPU revision is: 000f0103
Unknown BCM1480 rev 12
Broadcom SiByte BCM1480 Unknown Revision @ 900 MHz (SB-1A rev 0)
Board type: ONStor TuxRx
This kernel optimized for ONStor Cougar TuxRx Processor without CFE
Determined physical RAM map:
 memory: 0000000010000000 @ 0000000000000000 (usable)
 memory: 0000000020000000 @ 0000000080000000 (usable)
 memory: 0000000010000000 @ 00000000c0000000 (usable)
 memory: 00000000c0000000 @ 0000000140000000 (usable)
Detected 3 available secondary CPU(s)
Built 1 zonelists.  Total pages: 2068480
Kernel command line: console=duart0,57600n8 root=/dev/nfs ip=auto -s
Primary instruction cache 32kB, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, linesize 32 bytes.
Secondary cache 0kB, 4-way, linesize 32 bytes.
Synthesized TLB refill handler (42 instructions).
Synthesized TLB load handler fastpath (55 instructions).
Synthesized TLB store handler fastpath (55 instructions).
Synthesized TLB modify handler fastpath (54 instructions).
PID hash table entries: 4096 (order: 12, 32768 bytes)
Using 1.000 MHz high precision timer.
Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
Memory: 4014080k/4194304k available (2462k kernel code, 179968k reserved, 719k data, 152k init, 0k highmem)  <=== 4GiB, yay!
Mount-cache hash table entries: 256
Checking for the multiply/shift bug... no.
Checking for the daddi bug... no.


.
.
.
And then it resets, because it times out waiting for the other CPUs to
come to life.  We need to hook in the prom routine that starts the
additional CPU cores for that to work.

The highlights are: 4GiB of memory seen, four processor cores detected,
our first SMP kernel!!  It's all over but the shouting, now.


