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Date: Mon, 30 Nov 2009 14:36:34 -0800
From: Andrew Sharp <andy.sharp@lsi.com>
To: Ralf Baechle <ralf@linux-mips.org>
Subject: NUMA development for sb1 processors
Message-ID: <20091130143634.58416df2@ripper.onstor.net>
Organization: LSI
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Hi Ralf,

I have started to do the dev work to implement NUMA for sibyte
processors, and it ocurred to me that I should drop you a note just to
let you know, and also to ask if you have any advice for me.  The only
MIPS processor that has it is ip27, but I'm thinking I won't riff off
that too much as it's a very odd (early/old) architecture that doesn't
have much to do with, well, ours, at least. Ours looks exactly like you
might find for an opteron based NUMA system, except it's not opterons.

The biggest question in my mind is about the topology.  It seems that
probably the best way to work things is to have the PROM code pass in
topology information, but then the question becomes 'what does that
look like?'  X86 uses ACPI these days, and I'm not feeling excited about
trying to mimic that, and neither am I feeling motivated to try and
mimic what is there for ip27.  So I thought, well, maybe Ralf has an
opinion that might be helpful.  In case it isn't obvious, I will be
doing the PROM changes as well ~:^)  Our current PROM is occassionally
CFE based, at least for the part that handles booting.

My goal is to get this into the kernel, but without a standard for the
PROM support, I'm thinking I should put some effort into making the
topology part "usefulish" in a way that others can exploit it with a
minimum of pain, so any ideas or thoughts you might have would be
appreciated.

Cheers,

a
