Just
wanted to let
you know that we now have CF accesses working in PROM. This confirms
that the
hardware path to and from flash is ok and also incorporates all th
address
changes we had to make to support the CF from a
SiByte.
We
tried getting the
CF to be configured as memory instead of i/o, but we hit some roadblocks
with
this. For now, we are supporting the same scheme that we've used
before on
Bobcat when accessing CF, which is a mixture of i/o and memory
accesses.
Here's the address map that we're using on PCI in
PROM:
| Physical
Address |
Size |
Function |
Notes |
| 0000.0400 |
256 |
CF Controller I/O socket A |
Accessed at base of 0xdc000000; set in
ExCA i/o
0 |
| 0000.0800 |
256 |
CF Controller I/O socket B |
Accessed at base of 0xdc000000; set in
ExCA i/o
0 |
| 0001.0000 |
64KB |
CF Controller I/O ExCA |
Accessed at base of
0xdc000000; uses
base/index scheme |
| 0080.0000 |
64KB |
CF Controller Memory |
Socket memory accesses (set
in ExCA
memory 0); accessed at base of 0xf8.0000.0000 |
| 0081.0000 |
64KB |
CF Controller Socket A / ExCA
base |
Socket A memory accesses;
ExCA mapped at
0x800 offset; accessed at base of 0xf8.0000.0000 |
| 0082.0000 |
64KB |
CF Controller Socket B / ExCA
base |
Socket B memory accesses;
ExCA mapped at
0x800 offset; accessed at base of 0xf8.0000.0000 |
| 1a00.0000 |
16MB |
TXRX Shared Memory |
TXRX accesses this locally at
0x9000.0000 |
| 1b00.0000 |
16MB |
FP Shared Memory |
FP accesses this locally at
0x9000.0000 |
| 1f40.0000 |
64KB |
BM FPGA |
|
| 6000.0000 |
16MB |
SSC Shared Memory |
SSC accesses this locally at
0x8300.0000 |
Andy,
let Linux take
over and do whatever it likes. We know that accesses to all the
above
paths work.
Brian